Cirrus-logic CRD5376 User Manual Page 39
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- Table of contents
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CRD5376
DS612RD2 39
3.3.6 Data Capture
The Data Capture sub-panel collects samples from the target board and sets analysis parameters.
When the Capture button is pressed, the requested number of samples are collected from the target board
through the USB port and are split among the enabled channels. A four-channel system, for example, will
collect (Total Samples / 4) samples per channel. The maximum number of samples that can be collected
is 1,048,576 (1M). The number of samples per channel should be a power of two for the analysis FFT
routines to work properly.
After data is collected, analysis is performed using the selected parameters and the results are displayed
on the Analysis panel. The selected analysis window, bandwidth limit, full scale code, and full scale volt-
age parameters can be modified for the data set currently in memory and the analysis re-run by pressing
the REFRESH button on the Analysis Panel.
Control Description
Total Samples Sets the total number of samples to be collected. Multichannel acquisitions split the
requested number of samples among the channels. A maximum of 1,048,576 (1M)
samples can be collected.
Window Selects the type of analysis windowing function to be applied to the collected data
set. Used to ensure proper analysis of discontinuous data sets.
Bandwidth Limit (Hz) Sets the frequency range over which to perform analysis, used to exclude higher-fre-
quency components. Default value of zero performs analysis for the full Nyquist fre-
quency range.
Full Scale Code Defines the maximum positive full-scale 24-bit code from the digital filter. Used during
FFT noise analysis to set the 0 dB reference level.
Full Scale Voltage Defines the maximum peak-to-peak input voltage for the nV/rtHz Spot Noise analy-
sis.
Total Captures Sets the number of data sets to be collected and averaged together in the FFT mag-
nitude domain. The maximum number of data sets that can be averaged is 100.
Capture Starts data collection from the target board through the USB port. After data collec-
tion, analysis is run using parameters from this sub-panel.
Remaining Captures Indicates how many more data captures are remaining to complete the requested
number of Total Captures. A zero value means that the current data capture is the
last one.
Skip Samples Sets the total number of samples to be skipped prior to data collection. A maximum
of 64K samples can be skipped
- Features 1
- General Description 1
- REVISION HISTORY 2
- TABLE OF CONTENTS 3
- LIST OF FIGURES 4
- LIST OF TABLES 4
- 1. INITIAL SETUP 5
- 1.1 Kit Contents 5
- 1.2 Hardware Setup 5
- 1.2.1 Default Jumper Settings 6
- 1.3 Software Setup 7
- 1.3.1 PC Requirements 7
- 8 DS612RD2 8
- 1.4 Self-Testing CRD5376 9
- 1.4.1 Noise Test 9
- 1.4.2 Distortion Test 10
- 2. HARDWARE DESCRIPTION 11
- 2.1 Block Diagram 11
- 2.2.1.1 External Inputs - INA 12
- 2.2.1.4 Input Protection 12
- 2.2.1.5 Input RC Filters 13
- 2.2.1.7 Analog Test Switches 14
- 2.2.1.6 Common Mode Bias 14
- 2.2.2.3 Anti-alias RC Filters 17
- 2.2.3.2 Offset Enable - OFST 17
- 2.2.4 Delta-Sigma Test DAC 18
- 2.2.5 Voltage Reference 18
- 2.3 Digital Hardware 19
- 2.3.1 Digital Filter 19
- 20 DS612RD2 20
- 2.3.1.1 MCLK vs. MCLK/2 Usage 21
- 22 DS612RD2 22
- CS5376A uController MCLK/2 22
- SDTKI R74 R83 22
- DS612RD2 23 23
- 2.3.2.1 SPI Interface 24
- 2.3.2.2 USB Interface 24
- 2.3.2.3 Reset Source 24
- 2.3.2.4 Clock Source 24
- 2.3.2.5 Timebreak Signal 25
- 2.3.2.6 C2 Debug Interface 25
- 2.3.4 RS-485 Telemetry 26
- 2.3.4.1 CLK, SYNC 27
- 2.3.5 UART Connection 28
- 2.3.6 External Connector 28
- 2.4 Power Supplies 28
- DS612RD2 29 29
- 2.5.2 Differential Pairs 30
- 2.5.3 Bypass Capacitors 31
- 3. SOFTWARE DESCRIPTION 32
- 3.1 Menu Bar 32
- 3.2 About Panel 33
- 3.3 Setup Panel 34
- 3.3.1 USB Port 35
- 3.3.2 Digital Filter 36
- 3.3.3 Analog Front End 37
- 3.3.4 Test Bit Stream 37
- 3.3.5 Gain/Offset 38
- 3.3.6 Data Capture 39
- 3.3.7 External Macros 40
- 3.4 Analysis Panel 41
- 3.4.1 Test Select 42
- 3.4.2 Statistics 43
- 3.4.3 Plot Enable 43
- 44 DS612RD2 44
- 3.5 Control Panel 45
- 3.5.1 DF Registers 46
- 3.5.2 DF Commands 46
- 3.5.3 SPI 46
- 3.5.4 Macros 47
- 3.5.5 GPIO 47
- 3.5.6 Customize 48
- 3.5.7 External Macros 48
- 4. BILL OF MATERIALS 49
- 50 DS612RD2 50
- 5. LAYER PLOTS 51
- 52 DS612RD2 52
- DS612RD2 53 53
- 54 DS612RD2 54
- DS612RD2 55 55
- 56 DS612RD2 56
- 6. SCHEMATICS 57
- 58 DS612RD2 58
- DS612RD2 59 59
- 60 DS612RD2 60
- DS612RD2 61 61
- 62 DS612RD2 62
- DS612RD2 63 63
- 64 DS612RD2 64
- DS612RD2 65 65
- 66 DS612RD2 66
- DS612RD2 67 67
- 68 DS612RD2 68
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