1Copyright © Cirrus Logic, Inc. 2005 (All Rights Reserved)Cirrus Logic, Inc.www.cirrus.comCS3310Stereo Digital Volume ControlFeaturesz Complete Digita
CS331010 DS82F1PCB Layout, Grounding and Power Supply DecouplingAs with any high performance device which contains both analog and digital circuitry,
CS3310DS82F1 11Figure 7 is a 16k FFT plot demonstrating the crosstalk performance of the CS3310 at 20 kHz.Both channels were set to unity gain. The ri
CS331012 DS82F1.0.1 131.1.01.001.0001THD+N% vs AMPL (Vrms)Figure 6. THD+N vs. AMP Figure 7. 20 kHz Crosstalk0-20-40-60-80-100-120-140-160-18020.00
CS3310DS82F1 13PIN DESCRIPTIONPower Supply ConnectionsVA+ - Positive Analog Power, Pin 12.Positive analog supply. Nominally +5 volts.VA- - Negative An
CS331014 DS82F1Analog Inputs and OutputsAINL, AINR - Left and Right Channel Analog Inputs, Pins 16, 9.Analog input connections for the left and right
CS3310DS82F1 15ZCEN - Zero Crossing Enable, Pin 1.This pin enables or disables the zero crossing detection and time-out function usedduring analog out
CS331016 DS82F1PACKAGE DIMENSIONSINCHES MILLIMETERSDIM MIN MAX MIN MAXA 0.093 0.104 2.35 2.65A1 0.004 0.012 0.10 0.30B 0.013 0.020 0.33 0.51C 0.009 0.
CS3310DS82F1 17 Revision Date ChangesPP1 April 1991 Initial releasePP2 December 1992 Update specificationsPP3 February 1999 Update specificationsPP4Ju
CS33102 DS82F1ANALOG CHARACTERISTICS (TA = 25 °C, VA+, VD+ = 5 V ± 5%; VA- = -5V ± 5%; Rs = 0; RL = 2kΩ; CL = 20 pF; 10 Hz to 20 kHz Measurement Bandw
CS3310DS82F1 3DIGITAL CHARACTERISTICS (TA = 25 °C, VA+ , VD+ = 5V ± 5%, VA- = -5V ± 5% )SWITCHING CHARACTERISTICS (TA = 25 °C; VA+, VD+ = +5V ± 5%;
CS33104 DS82F1RECOMMENDED OPERATING CONDITIONS (DGND = 0V; all voltages with respect to ground)Notes: 3. Applying power to VD+ prior to VA+ creates a
CS3310DS82F1 5CS3310AINLAINRAGNDL AGNDRVD+ VA+VA-SDATAOCSSDATAITO ANOTHER CS3310 ORCONTROLLERCONTROLLERSCLKAUDIOSOURCEAOUTLAOUTR7101112131415+++5V ANA
CS33106 DS82F1GENERAL DESCRIPTIONThe CS3310 is a stereo, digital volume control designed for audio systems. The levels of the leftand right analog inp
CS3310DS82F1 7In single device operation, volume control data is loaded into the 16-bit shift register by holdingthe CS pin low for sixteen SCLK pulse
CS33108 DS82F1Changing the Analog Output LevelCare has been taken to ensure that there are no audible artifacts in the analog output signal dur-ing vo
CS3310DS82F1 9a source of distortion if the source impedance becomes appreciable relative to the reversed bi-ased diode capacitance. Source impedances
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