Cirrus-logic CRD5376 User Manual Page 24
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CRD5376
24 DS612RD2
Many connections to the C8051F320 microcontroller are inactive by default, but are provided for conve-
nience during custom reprogramming. Listed below are the default active connections to the microcon-
troller and how they are used.
2.3.2.1 SPI Interface
The microcontroller SPI interface communicates with the CS5376A digital filter to write/read configuration
information from the SPI 1 port and collect conversion data from the SD port. Detailed information about
interfacing to the digital filter SPI 1 and SD ports can be found in the CS5376A data sheet.
2.3.2.2 USB Interface
The microcontroller USB interface communicates with the PC evaluation software to receive configuration
commands and return collected conversion data. The USB interface uses the Silicon Laboratories API
and Windows drivers, which are available free from the internet (http://www.silabs.com
).
2.3.2.3 Reset Source
By default, the C8051F320 microcontroller receives its reset signal from the internal power-on reset. This
reset signal is also output to the CS5376A digital filter.
2.3.2.4 Clock Source
By default, the C8051F320 microcontroller uses an internally generated 12 MHz clock for compatibility
with USB standards.
Pin # Pin Name Assignment Description
17 P2.1 TIMEB Time Break signal to CS5376A
18 P2.0 SYNC SYNC signal to CS5376A
19 P1.7 BYP_EN I2C bypass switch control
20 P1.6 SDA_DE I2C data driver enable
21 P1.5 SCL I2C clock in/out
22 P1.4 SDA I2C data in/out
23 P1.3 SSIz SPI chip select output, active low
24 P1.2 MOSI SPI master out / slave in
Pin # Pin Name Assignment Assignment
25 P1.1 MISO SPI master in / slave out
26 P1.0 SCK1 SPI serial clock
27 P0.7 Internal VREF bypass capacitors
28 P0.6 SINTz Serial acknowledge from CS5376A, active low
29 P0.5 RX UART receiver
30 P0.4 TX UART transmitter
31 P0.3 4.096MHZ External clock input
32 P0.2 SDRDYz Data ready acknowledge from CS5376A, active low
- Features 1
- General Description 1
- REVISION HISTORY 2
- TABLE OF CONTENTS 3
- LIST OF FIGURES 4
- LIST OF TABLES 4
- 1. INITIAL SETUP 5
- 1.1 Kit Contents 5
- 1.2 Hardware Setup 5
- 1.2.1 Default Jumper Settings 6
- 1.3 Software Setup 7
- 1.3.1 PC Requirements 7
- 8 DS612RD2 8
- 1.4 Self-Testing CRD5376 9
- 1.4.1 Noise Test 9
- 1.4.2 Distortion Test 10
- 2. HARDWARE DESCRIPTION 11
- 2.1 Block Diagram 11
- 2.2.1.1 External Inputs - INA 12
- 2.2.1.4 Input Protection 12
- 2.2.1.5 Input RC Filters 13
- 2.2.1.7 Analog Test Switches 14
- 2.2.1.6 Common Mode Bias 14
- 2.2.2.3 Anti-alias RC Filters 17
- 2.2.3.2 Offset Enable - OFST 17
- 2.2.4 Delta-Sigma Test DAC 18
- 2.2.5 Voltage Reference 18
- 2.3 Digital Hardware 19
- 2.3.1 Digital Filter 19
- 20 DS612RD2 20
- 2.3.1.1 MCLK vs. MCLK/2 Usage 21
- 22 DS612RD2 22
- CS5376A uController MCLK/2 22
- SDTKI R74 R83 22
- DS612RD2 23 23
- 2.3.2.1 SPI Interface 24
- 2.3.2.2 USB Interface 24
- 2.3.2.3 Reset Source 24
- 2.3.2.4 Clock Source 24
- 2.3.2.5 Timebreak Signal 25
- 2.3.2.6 C2 Debug Interface 25
- 2.3.4 RS-485 Telemetry 26
- 2.3.4.1 CLK, SYNC 27
- 2.3.5 UART Connection 28
- 2.3.6 External Connector 28
- 2.4 Power Supplies 28
- DS612RD2 29 29
- 2.5.2 Differential Pairs 30
- 2.5.3 Bypass Capacitors 31
- 3. SOFTWARE DESCRIPTION 32
- 3.1 Menu Bar 32
- 3.2 About Panel 33
- 3.3 Setup Panel 34
- 3.3.1 USB Port 35
- 3.3.2 Digital Filter 36
- 3.3.3 Analog Front End 37
- 3.3.4 Test Bit Stream 37
- 3.3.5 Gain/Offset 38
- 3.3.6 Data Capture 39
- 3.3.7 External Macros 40
- 3.4 Analysis Panel 41
- 3.4.1 Test Select 42
- 3.4.2 Statistics 43
- 3.4.3 Plot Enable 43
- 44 DS612RD2 44
- 3.5 Control Panel 45
- 3.5.1 DF Registers 46
- 3.5.2 DF Commands 46
- 3.5.3 SPI 46
- 3.5.4 Macros 47
- 3.5.5 GPIO 47
- 3.5.6 Customize 48
- 3.5.7 External Macros 48
- 4. BILL OF MATERIALS 49
- 50 DS612RD2 50
- 5. LAYER PLOTS 51
- 52 DS612RD2 52
- DS612RD2 53 53
- 54 DS612RD2 54
- DS612RD2 55 55
- 56 DS612RD2 56
- 6. SCHEMATICS 57
- 58 DS612RD2 58
- DS612RD2 59 59
- 60 DS612RD2 60
- DS612RD2 61 61
- 62 DS612RD2 62
- DS612RD2 63 63
- 64 DS612RD2 64
- DS612RD2 65 65
- 66 DS612RD2 66
- DS612RD2 67 67
- 68 DS612RD2 68
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