Cirrus-logic CS8406 User Manual download pdf (Page 20)

20 DS580F6

CS8406

MMTCS - Select A or B channel status data to transmit in Mono Mode

Default = ‘0’

0 - Use channel A CS data for the A subframe and use channel B CS data for the B subframe

1 - Use the same CS data for both the A and B subframe outputs. If MMTLR = 0, use the left channel CS

data. If MMTLR = 1, use the right channel CS data.

MMTLR - Channel Selection for AES Transmitter Mono Mode

Default = ‘0’

0 - Use left channel input data for consecutive subframe outputs

1- Use right channel input data for consecutive subframe outputs

8.4 Data Flow Control (03h)

The Data Flow Control register configures the flow of audio data. The output data should be muted prior to

changing bits in this register to avoid transients.

TXOFF - AES3 Transmitter Output Driver Control

Default = ‘0

0 - AES3 transmitter output pin drivers normal operation

1 - AES3 transmitter output pin drivers drive to 0 V.

AESBP - AES3 bypass mode selection

Default = ‘0’

0 - Normal operation

1 - Connect the AES3 transmitter driver input di rectly to the RXP pin, which becomes a normal TTL

threshold digital input.

8.5 Clock Source Control (04h)

This register configures the clock sources of various blocks. In conjunction with the Data Flow Control reg-

ister, various Receiver/Transmitter/Transceiver modes may be selected.

RUN - Controls the internal clocks, allowing the CS8406 to be placed in a “powered down” low current con-

sumption, state.

Default = ‘0’

0 - Internal clocks are stopped. Internal state machines are reset. The fully static

control port registers are operational, allowing registers to be read or changed. Reading and

writing the U and C data buffers is not possible. Power consumption is low.

1 - Normal part operation. This bit must be set to 1 to allow the CS8406 to begin operation.

All input clocks should be stable in frequency and phase when RUN is set to 1.

CLK1:0 - Output master clock (OMCK) input frequency to output sample rate (Fs) ratio selector. If these bits

are changed during normal operation, always stop the CS8406 first (RUN = 0), write the new value, then

start the CS8406 (RUN = 1).

7 6 543210

0 TXOFF AESBP 0 0 0 0 0

7 6 543210

0 RUN CLK1 CLK0 0 0 0 0

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 38 39

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Cirrus-logic CS8406 User Manual Page 20