Cirrus-logic CS5460A User Manual download pdf (Page 32)

CS5460A

32 DS487F5

age channel’s analog input signal with respect to

the current channel’s analog input signal.

With the default setting, the phase delay on the

voltage channel signal is ~0.995 µs (~0.0215 de-

grees assuming a 60 Hz power signal). With

MCLK = 4.096 MHz and K = 1, the range of the in-

ternal phase compensation ranges from

-2.8 degrees to +2.8 degrees when the input volt-

age/current signals are at 60 Hz. In this condition,

each step of the phase compensation register (val-

ue of one LSB) is ~0.04 degrees. For values of

MCLK other than 4.096 MHz, these values for the

span (-2.8 to +2.8 degrees) and for the step size

(0.04 degrees) should be scaled by

4.096 MHz / (MCLK / K). For power line frequen-

cies other than 60Hz (e.g., 50 Hz), the values of

the range and step size of the PC[6:0] bits can be

determined by converting the above values to

time-domain (seconds), and then computing the

new range and step size (in degrees) with respect

to the new line frequency.

Unlike offset/gain calibration, the CS5460A does

not provide an automated on-chip phase calibra-

tion sequence. To calibrate the phase delay, the

phase compensation bits can be adjusted while the

CS5460A is running in ‘continuous computation

cycles’ data acquisition mode. For example, the

CS5460A can be set up to perform continuous

computations on a purely resistive load (no induc-

tance or capacitance). The PC[6:0] bits can then

be adjusted until the Energy Register value is max-

imized.

3.10 Time-Base Calibration Register

The Time-Base Calibration Register (notated as

“TBC” in Figure 3) is used to compensate for slight

errors in the XIN input frequency. External oscilla-

tors and crystals have certain tolerances. If there is

a concern about improving the accuracy of the

clock for energy measurements, the Time-Base

Calibration Register value can be manipulated to

compensate for the frequency error. Note from Fig-

ure 3 that the TBC Register only affects the value

in the Energy Register.

As an example, if the desired XIN frequency is

4.096 MHz, but during production-level testing,

suppose that the average frequency of the crystal

on a particular board is measured to actually be

4.091 MHz. The ratio of the desired frequency to

the actual frequency is 4.096 MHz/4.091 MHz =

~1.00122219506. The TBC Register can be set to

1.00122213364 = 0x80280C(h), which is very

close to the desired ratio.

3.11 Power Offset Register

Referring to Figure 3, note the “Poff” Register that

appears just after the power computation. This reg-

ister can be used to offset system power sources

that may be resident in the system, but do not orig-

inate from the power line signal. These sources of

extra energy in the system contribute undesirable

and false offsets to the power/energy measure-

ment results. For example, even after DC offset

and AC offset calibrations have been run on each

channel, when a voltage signal is applied to the

voltage channel inputs and the current channel is

grounded (i.e., there is zero input on the current

channel), the current channel may still register a

very small amount of RMS current caused by leak-

age of the voltage channel input signal into the cur-

rent channel input signal path. Although the

CS5460A has high channel-to-channel crosstalk

rejection, such crosstalk may not totally be elimi-

nated.) If the amount of ‘artificial’ power that might

be induced into the voltage/current channel signals

due to such crosstalk/system noise/etc. can be de-

termined, then the Power Offset Register can be

programmed to nullify the effects of this unwanted

energy.

3.12 Input Protection - Current Limit

In Figures 6, 7, 8, and 9, note the series resistor RI+

which is connected to the IIN+ input pin. This resis-

tor serves two purposes. First, this resistor func-

tions in coordination with C

Idiff and/or CIdiff to form a

low-pass filter. The filter will a) remove any broad-

band noise that is far outside of the frequency

range of interest, and also b) this filter serves as

the anti-aliasing filter, which is necessary to pre-

vent the A/D converter from receiving input signals

whose frequency is higher than one-half of the

sampling frequency (the Nyquist frequency). The

second purpose of this resistor is to provide cur-

rent-limit protection for the Iin+ input pin, in the

event of a power surge or lightning surge. The role

that R

I+ contributes to input filtering will be dis-

cussed in the Section 3.13. But first the current-lim-

it protection requirements for the Iin+/Iin- and

Vin+/Vin- pins are discussed.

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Cirrus-logic CS5460A User Manual Page 32

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