Cirrus-logic CDB5345 User Manual Page 12

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CDB5345
12 DS658DB1
5.3 SUBCLOCK SOURCE CONTROL - ADDRESS 03H
5.3.1 SUBCLOCK SOURCE (BITS 1:0)
Default = 01
Function:
This bit selects the source of the CS5345 SCLK and LRCK signals. Table 2 shows the available set-
tings.
5.4 TRANSMITTER SDIN SOURCE CONTROL - ADDRESS 05H
5.4.1 CS8406 SDIN SOURCE (BIT 4)
Default = 0
Function:
These bit selects the source of the CS8406 SDIN signal. Table 3 shows the available settings.
76543210
Reserved Reserved Reserved Reserved Reserved Reserved SUBCLK1 SUBCLK0
Table 2. Subclock Source
SUBCLOCK1 SUBCLOCK Subclock Source
0 0 - CS5345 is Master
- CS8406 is Slave to CS5345
- PCM I/O Header Subclocks are Output from CS5345
0 1 - CS5345 is Slave to CS8406
- CS8406 is Master
- PCM I/O Header Subclocks are Output from CS8406
1 0 - CS5345 is Slave to Header
- CS8406 is Slave to Header
- PCM I/O Header Subclocks are an Input
11 Reserved
76543210
Reserved Reserved Reserved CS8406 Reserved Reserved Reserved Reserved
Table 3. CS8406 SDIN Source
CS8406 CS8406 SDIN Source
0Reserved
1 CS5345 SDOUT
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