Cirrus-logic CDB5560 User Manual Page 1

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Copyright Cirrus Logic, Inc. 2009
(All Rights Reserved)
www.cirrus.com
CDB5560
50 kSps, 24-bit, High-throughput
ΔΣ
ADC
Evaluation Board
Features
Two Analog Input Channels Multiplexed to the CS5560 ADC
Pre-configured to require a minimum number of external
connections to your data acquisition system.
All functionality accessible through the connector interface
and board-level options.
On-board 4.096 V Reference
Pre-configured for Master mode SPI™ communication to a
data capture system.
General Description
The CDB5560 is a versatile tool designed for evaluating the func-
tionality and performance of the CS5560 ADC (Analog-to-Digital
Converter). The SPI serial port on the CDB5560 evaluation board
is configured in Master mode and will start transmitting data after
power-up upon reset. This evaluation board is designed to connect
to your data capture system or will interface to the CapturePlus II
data acquisition system available from Cirrus Logic.
The CS5560 delta-sigma ADC produces fully settled conversions to
full specified accuracy at 50 kSps. This ability to produce fully settled
conversions for every sample makes it suitable for converting multi-
plexed input signals. To help evaluate this feature, the CDB5560
includes two differential analog inputs multiplexed into the CS5560.
The multiplexer can be switched at the CS5560 ADC sample speed
and the ADC will produce fully settled conversion data for each input
channel.
All evaluation board functionality for evaluating the CS5560 ADC is
accessed through the connector interface and board-level options.
Schematics in PADS™ PowerLogic™ format are available for
download at:
http://www.cirrus.com/en/products/pro/detail/P1120.html
.
ORDERING INFORMATION
CDB5560 Evaluation Board
OCT ‘09
DS713DB4
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Summary of Contents

Page 1 - Evaluation Board

Copyright  Cirrus Logic, Inc. 2009(All Rights Reserved)www.cirrus.comCDB556050 kSps, 24-bit, High-throughput ΔΣ ADCEvaluation BoardFeatures Two Anal

Page 2 - LIST OF TABLES

CDB556010 DS713DB4APPENDIX B. BILL OF MATERIALS CIRRUS LOGICCDB5560-Z_REV_C2.PLBILL OF MATERIALItem Cirrus P/N Rev De

Page 3 - 1. INTRODUCTION

CDB5560DS713DB4 11APPENDIX C. SCHEMATICS Figure 3. Schematic - Block Diagram

Page 4 - 1.1 Overview

CDB556012 DS713DB4 Figure 4. Schematic - Power Supplies

Page 5 - DC Supply

CDB5560DS713DB4 13 Figure 5. Schematic - Input Buffers and Multiplexer

Page 6 - 3.3.1 Analog Input Buffers

CDB556014 DS713DB4 Figure 6. Schematic - CS5560

Page 7 - 3.3.5 ADC Reference Frequency

CDB5560DS713DB4 15 Figure 7. Schematic - Configuration & Misc.

Page 8 - 3.4.1 Hardware Configuration

CDB556016 DS713DB4APPENDIX D. LAYER PLOTS Figure 8. Top SilkscreenCalibration function has been removed fr

Page 9 - A.2 Hardware Considerations

CDB5560DS713DB4 17 Figure 9. Top Solder Mask

Page 10 - 10 DS713DB4

CDB556018 DS713DB4 Figure 10. Top Routing

Page 11 - DS713DB4 11

CDB5560DS713DB4 19 Figure 11. Ground Plane

Page 12 - 12 DS713DB4

CDB55602 DS713DB4TABLE OF CONTENTS1. INTRODUCTION ...

Page 13 - DS713DB4 13

CDB556020 DS713DB4 Figure 12. Power Plane

Page 14 - Figure 6. Schematic - CS5560

CDB5560DS713DB4 21 Figure 13. Bottom Solder Mask

Page 15 - DS713DB4 15

CDB556022 DS713DB4 Figure 14. Bottom Silkscreen

Page 16 - 16 DS713DB4

CDB5560DS713DB4 23 Figure 15. Top Solder Paste Mask

Page 17 - Figure 9. Top Solder Mask

CDB556024 DS713DB4 Figure 16. Bottom Routing

Page 18 - Figure 10. Top Routing

CDB5560DS713DB4 25APPENDIX E. CALIBRATION FUNCTIONThe calibration function has been removed from the CS5560. All references to calibration have been r

Page 19 - Figure 11. Ground Plane

CDB556026 DS713DB4REVISION HISTORY Revision Date ChangesDB1 APR 2007 Initial Release.DB2 JUN 2007 Updated schem

Page 20 - Figure 12. Power Plane

CDB5560DS713DB4 31. INTRODUCTIONThe CDB5560 evaluation board is a platform for evaluating the CS5560 ADC performance. The evalua-tion board is design

Page 21 - DS713DB4 21

CDB55604 DS713DB41.1 OverviewThe CDB5560 evaluation board has both analog and digital circuit sections. The analog section consistsof the CS5560 ADC,

Page 22 - Figure 14. Bottom Silkscreen

CDB5560DS713DB4 52. QUICK START The CDB5560 evaluation board is designed to interface with a data acquisition system. To conne

Page 23 - DS713DB4 23

CDB55606 DS713DB43. HARDWARE DESCRIPTION3.1 Absolute Maximum RatingsObserve the following limits to ensure the CDB5560 component ratings are not excee

Page 24 - Figure 16. Bottom Routing

CDB5560DS713DB4 7For detailed information on the LMP7732 precision industrial op-amps, please visit National Semiconduc-tor’s website at www.national.

Page 25 - DS713DB4 25

CDB55608 DS713DB43.4 Digital Section3.4.1 Hardware ConfigurationThe CDB5560 evaluation board hardware comes pre-configured so the only connection requ

Page 26

CDB5560DS713DB4 9APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5560A.1 PCB Layout Considerations• Keep the signal path short between the CS5560 ADC

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