Cirrus-logic CDB5346 User Manual

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Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
http://www.cirrus.com
Evaluation Board for CS5346
Features
Single-ended Analog Inputs
Single-ended Analog Outputs
CS8406 S/PDIF Digital Audio Transmitter
Header for Optional External Software
Configuration of CS5346
Header for External PCM Serial Audio I/O
3.3 V Logic Interface
Pre-defined Software Scripts
Demonstrates Recommended Layout and
Grounding Arrangements
Windows
®
-compatible Software Interface to
Configure CS5346 and Inter-board
Connections
Description
The CDB5346 evaluation board is an excellent means
for evaluating the CS5346 ADC. Evaluation requires an
analog signal source and analog/digital analyzer, and
power supplies. A Windows PC-compatible computer
must be used to evaluate the CS5346.
System timing for the I²S, Left-Justified and Right-Justi-
fied interface formats can be provided by the CS5346,
the CS8406, or by the PCM I/O stake header with an ex-
ternal source connected.
RCA phono jacks are provided for the CS5346 analog
inputs and outputs. Digital data input is available via
RCA phono or optical connectors to the CS8406.
The Windows software provides a GUI to make config-
uration of the CDB5346 easy. The software
communicates through the PC’s USB to configure the
control port registers so that all features of the CS5346
can be evaluated. The evaluation board may also be
configured to accept external timing and data signals for
operation in a user application during system
development.
ORDERING INFORMATION
CDB5346 Evaluation Board
CS5346
Discrete Buffers
CS8406
Passive Input Filters
Microphone Inputs
Active Output Filter
Control Port Interface
Test Points
Master Clock
Sub-clocks and Data
12
2
Master
Clock
Left/Right
Clock
Header
CS2000
2
NOV '08
DS861DB1
CDB5346
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Summary of Contents

Page 1 - Evaluation Board for CS5346

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.comEvaluation Board for CS5346Features Single-ended Analog Inputs Single-e

Page 2 - LIST OF TABLES

10 DS861DB1CDB53465. CDB BLOCK DIAGRAMCS5346Discrete BuffersCS8406Passive Input FiltersMicrophone InputsActive Output FilterControl Port InterfaceTest

Page 3 - 1. SYSTEM OVERVIEW

DS861DB1 11CDB53466. CDB SCHEMATICSFigure 4. CS5346 (Schematic Sheet 1)

Page 4 - 1.9 Serial Control Port

12 DS861DB1CDB5346Figure 5. Analog Inputs/Outputs (Schematic Sheet 2)

Page 5 - 2. SYSTEM CLOCKS AND DATA

DS861DB1 13CDB5346Figure 6. USB Microcontroller (Schematic Sheet 3)

Page 6 - 3. PC SOFTWARE CONTROL

14 DS861DB1CDB5346Figure 7. S/PDIF and PCM Output (Schematic Sheet 4)

Page 7 - 3.2 Register Maps Tab

DS861DB1 15CDB5346Figure 8. Power (Schematic Sheet 5)

Page 8

16 DS861DB1CDB53467. CDB LAYOUTFigure 9. Component Map

Page 9 - Table 1. System Connections

DS861DB1 17CDB5346Figure 10. Top Layer

Page 10 - 5. CDB BLOCK DIAGRAM

18 DS861DB1CDB5346Figure 11. Bottom Layer

Page 11 - 6. CDB SCHEMATICS

DS861DB1 19CDB53468. REVISION HISTORY Revision ChangesDB1 Initial ReleaseTable 3. Revision History

Page 12 - 12 DS861DB1

2 DS861DB1CDB5346TABLE OF CONTENTS1. SYSTEM OVERVIEW ...

Page 13 - DS861DB1 13

20 DS861DB1CDB5346Contacting Cirrus Logic SupportFor all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one

Page 14 - 14 DS861DB1

DS861DB1 3CDB53461. SYSTEM OVERVIEW The CDB5346 evaluation board is an excellent means for evaluating the CS5346 ADC. Analog and digital audiosignal i

Page 15 - DS861DB1 15

4 DS861DB1CDB53461.5 CS2000The CS2000-CP, U7, provides the master clock source to the CDB5346.The CS2000-CP is a highly configurable clock synthesizer

Page 16 - 7. CDB LAYOUT

DS861DB1 5CDB53462. SYSTEM CLOCKS AND DATAThe CDB5346 implements comprehensive clock routing capabilities. Configuration of the clock routing can be e

Page 17 - DS861DB1 17

6 DS861DB1CDB53463. PC SOFTWARE CONTROLThe CDB5346 uses a Microsoft Windows-based GUI (download from Cirrus web site), which allows control of theCS53

Page 18 - 18 DS861DB1

DS861DB1 7CDB53463.2 Register Maps TabThe Register Maps tab provides low level control over the register level settings of the CS5346, CS8406,and CS20

Page 19 - 8. REVISION HISTORY

8 DS861DB1CDB53463.3.2 12.288MHz, CS8406 Master - ADC Ch 1 In to SPDIF OutUsing the pre-configured script file named “12.288MHz _CS8406 Master_- ADC C

Page 20 - 20 DS861DB1

DS861DB1 9CDB53464. CDB CONNECTORS, JUMPERS, AND SWITCHES CONNECTORReference Designator INPUT/OUTPUT SIGNAL PRESENT+5V J22 Input +5.0 V Power Suppl

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