Cirrus-logic CS5381 User Manual download pdf (Page 14)

14 DS563F2

CS5381

TYPICAL CONNECTION DIAGRAM

FILT+

AINL+

AINL-

V

D

0.01

µ

F

A/D CONVERTER

SCLK

CS5381

M/S

MCLK

AINR+

AINR-

VQ

**47

µ

F

+

RST

VA V

L

+5V

1

µ

F

+5Vto 2.5 V

5.1

Ω

1

µ

F

+

+ +

SDOUT

GND

I

2

S/LJ

LRCK

GND

Power Down

and Mode

Settings

Audio Data

Processor

Timing Logic

and Clock

0.01

µ

F

0.01

µ

F

0.01

µF

HPF

M0

M1

REFGND

MDIV

+5 V to 3.3 V

1

µ

F 0.01

µF

1

µ

F

+

Analog

Input

Buffer

(Figure 24)

Analog

Input

Buffer

(Figure 24)

OVFL

10 k

VL

*

0.01

µ

F

** Capacitor value

affects low frequency

distortion. See

Section 3.9.

* Resistor may only

be used if VD is

derived from VA. If

used, do not drive any

other logic from VD.

Figure 22. Typical Connection Diagram

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 23 24

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