Cirrus-logic CS8900A User Manual Page 12
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12 DS271F5
CS8900A
Crystal LAN™ Ethernet Controller
CIRRUS LOGIC PRODUCT DATASHEET
2.0 PIN DESCRIPTION
36
40
41
46
47
48
49
50
26
27
28
29
30
31
33
32
34
35
37
38
39
42
43
44
45
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
76
77
78
79
80
2
1
3
16
5
4
6
8
7
9
10
11
12
13
14
15
17
18
20
19
21
22
23
24
53
54
55
56
57
58
59
60
61
62
63
64
51
52
65
66
68
67
69
70
71
72
73
74
75
25
EEDataOut
EESK
EECS
EEDataIn
CHIPSEL
DMACK2
DMACK1
DMACK0
DMARQ2
DMARQ1
DMARQ0
SD15
SD14
SD13
SD12
DVDD2
DVSS2
SD11
CSOUT
SD10
SD08
SA3
SA4
SA15
SA14
AVSS4
BSTATUS or HC1
TXD +
TXD -
AVSS1
AVDD1
RXD -
RXD +
AVSS2
AVDD2
TEST
SLEEP
XTAL1
XTAL2
RES
AVSS3
SA0
INTRQ2
INTRQ1
IOCS16
INTRQ0
MEMCS16
SBHE
SA1
SA2
INTRQ3
SA9
SA10
SA8
SA11
SA5
SA6
SA7
REFRESH
SA19
SA18
SA17
DVDD3
DVSS3
SA16
SD0
AEN
IOW
IOR
IOCHRDY
SD1
SD5
SD4
SD3
SD2
DVSS4
DVDD4
SD6
SD7
LINKLED or HC0
RESET
SA13
MEMW
MEMR
DVSS1
DVDD1
ELCS
AVSS0
DVSS1A
SD09
SA12
DVSS3A
AVDD3
LANLED
DO-
DO+
DI-
DI+
CI-
CI+
CS8900A
100-pin
TQFP
(Q)
Top View
- Crystal LAN™ Ethernet 1
- Controller 1
- TABLE OF CONTENTS 2
- 8 DS271F5 8
- DS271F5 9 9
- and Auto 9
- 10 DS271F5 10
- Top View 12
- DS271F5 13 13
- 14 DS271F5 14
- DS271F5 15 15
- 16 DS271F5 16
- DS271F5 17 17
- Table 3. DMA Assignments 19
- 20 DS271F5 20
- Default Configuration 21
- DS271F5 23 23
- Figure 4. Group Header 23
- 24 DS271F5 24
- Table 8. EEPROM Commands 25
- 26 DS271F5 26
- DS271F5 27 27
- 30 DS271F5 30
- Figure 8. MAC Interface 30
- DS271F5 31 31
- 32 DS271F5 32
- DS271F5 33 33
- Figure 10. Two-Part Deferral 33
- 34 DS271F5 34
- Figure 11. Simple Deferral 34
- 10BASE-T 35
- Transceiver 35
- Table 12. Interface Selection 36
- 10BASE-T Transceiver 37
- Packet Packet 38
- DS271F5 39 39
- Figure 15. AUI 39
- 40 DS271F5 40
- 4.3 Bus Interface Registers 44
- 4.3.2 I/O Base Address 44
- 4.3.3 Interrupt Number 44
- 4.3.4 DMA Channel Number 45
- 4.3.5 DMA Start of Frame 45
- 4.3.6 DMA Frame Count 46
- 4.3.7 RxDMA Byte Count 46
- 4.3.8 Memory Base Address 46
- 4.3.9 Boot PROM Base Address 46
- 4.3.11 EEPROM Command 47
- 4.3.12 EEPROM Data 48
- DS271F5 49 49
- 52
- 76543210 53
- RegContent RegNum 53
- FEDCBA9 8 53
- RegContent 53
- StreamE Skip_1 000011 54
- PromiscuousA IAHashA 000101 56
- 0000 0000 0000 1000 58
- RxDMAiE SWint-X 001011 59
- RxDMA frame SWint 001100 60
- 0000 0000 0000 1100 61
- SerTxOn SerRxON 010011 62
- LinkOK 010100 63
- CRS PolarityOK 10BT AUI 63
- RESET 010101 64
- TxBidErr 011000 66
- Rdy4Tx NOW 66
- AUI Delay 011100 68
- AUI Delay 68
- 4.5.2 Transmit Length 69
- 4.6 Address Filter Registers 71
- 72 DS271F5 72
- Word Transfer 73
- 74 DS271F5 74
- Table 18. I/O Mode Mapping 75
- DS271F5 77 77
- 78 DS271F5 78
- ISQ = 0000h? 79
- Frame Pre 80
- Processed 80
- Table 21 81
- DS271F5 85 85
- Table 24. Example Memory Map 86
- RxStatus - Frame 2 93
- DS271F5 97 97
- 98 DS271F5 98
- 102 DS271F5 102
- DS271F5 103 103
- 104 DS271F5 104
- DS271F5 105 105
- Table 41 108
- Table 39 108
- Table 40 108
- Table 42 109
- Table 41. (continued) 109
- 110 DS271F5 110
- DS271F5 111 111
- 7.3 DC CHARACTERISTICS (T 112
- SA [15:0] 114
- AEN, SBHE 114
- SD [15:0] Valid Data 114
- DIRECTION: 115
- IN or OUT of chip 115
- Valid Address 117
- SD [15:0] Valid Data In 117
- EEData Out 120
- EEData In 120
- 7.5 10BASE-T WIRING 121
- 7.6 AUI WIRING 122
- 8.3 DC CHARACTERISTICS (T 123
- 8.5 10BASE-T WIRING 132
- 8.6 AUI WIRING 133
- 100L LQFP PACKAGE DRAWING 134
- DS271F5 135 135
- 136 DS271F5 136
- DS271F5 137 137
- 138 DS271F5 138
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