Cirrus-logic CS4397 User Manual

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Copyright Cirrus Logic, Inc. 2004
(All Rights Reserved)
http://www.cirrus.com
CS4397
24-Bit, Multi-Standard D/A Converter for Digital Audio
Features
24 Bit Conversion
Up to 192 kHz Sample Rates
120 dB Dynamic Range
-100 dB THD+N
Supports PCM, DSD and External
Interpolation filters
Advanced Dynamic-Element Matching
Low Clock Jitter Sensitivity
Digital De-emphasis for 32 kHz, 44.1 kHz and
48 kHz
External Reference Input
Description
The CS4397 is a complete high performance 24-bit
48/96/192 kHz stereo digital-to-analog conversion sys-
tem. The device includes a digital interpolation filter
followed by a oversampled multi-bit delta-sigma modula-
tor which drives dynamic-element-matching (DEM)
selection logic. The output from the DEM block controls
the input to a multi-element switched capacitor DAC/low-
pass filter, with fully-differential outputs. This multi-bit ar-
chitecture features significantly lower out-of-band noise
and jitter sensitivity than traditional 1-bit designs, and the
advanced DEM guarantees low noise and distortion at
all signal levels.
ORDERING INFORMATION
CS4397-KS -10° to 70° C 28-pin Plastic SOIC
CS4397-KSZ -10° to 70° C 28-pin Plastic SOIC Lead free
CDB4397 Evaluation Board
I
SCLK
MCLK
M4
LRCK
SDATA
AOUTL+
AOUTR+
SERIAL INTERFACE
AND FORMAT SELECT
INTERPOLATION
SOFT MUTE
∆Σ
MODULATOR
DYNAMIC
DE-EMPHASIS
SWITCHED
AOUTL-
AOUTR-
FILT+
FILTER
INTERPOLATION
FILTER
FILTER
MULTI-BIT
∆Σ
MODULATOR
MULTI-BIT
ELEMENT
MATCHING
LOGIC
DYNAMIC
ELEMENT
MATCHING
LOGIC
CAPACITOR-DAC
AND FILTER
SWITCHED
CAPACITOR-DAC
AND FILTER
VREF CMOUTFILT-
VOLTAGE REFERENCE
HARDWARE MODE CONTROL
CLOCK
DIVIDER
(CONTROL PORT)
(AD0/CS)
M3 M2
(AD1/CDIN) (SCL/CCLK)
M1
M0
(SDA/CDOUT)
RESET MUTEC MUTE
SEP ‘04
DS333F1
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Summary of Contents

Page 1 - Description

1Copyright Cirrus Logic, Inc. 2004(All Rights Reserved)http://www.cirrus.comCS439724-Bit, Multi-Standard D/A Converter for Digital AudioFeatures24 B

Page 2 - TABLE OF CONTENTS

CS439710 DS333F1SWITCHING CHARACTERISTICS (TA= -10 to 70°C; Logic 0 = AGND = DGND; Logic 1 = VD = 5.25 to 3.0 Volts; CL=20pF) Parameter Symbol Min Ty

Page 3 - TABLE OF FIGURES

CS4397DS333F1 11DSD - SWITCHING CHARACTERISTICS (TA= -10 to 70°C; Logic 0 = AGND = DGND; Logic 1 = VD = 5.25 to 3.0 Volts; CL=20pF) Parameter Symbol M

Page 4 - ANALOG CHARACTERISTICS (T

CS439712 DS333F18X INTERPOLATOR - SWITCHING CHARACTERISTICS (TA= -10 to 70°C; Logic 0 = AGND = DGND; Logic 1 = VD = 5.25 to 3.0 Volts; CL=20pF) Notes:

Page 5 - Analog Output

CS4397DS333F1 13SWITCHING CHARACTERISTICS - CONTROL PORT (TA = 25 °C; VD = 5.25 V to 3.0 Volts; Inputs: logic 0 = AGND, logic 1 = VD, CL = 30 pF)Note

Page 6 - Figures 9-28

CS439714 DS333F1SWITCHING CHARACTERISTICS - CONTROL PORT (TA = 25 °C; VD = 5.25 V to 3.0 Volts; Inputs: logic 0 = AGND, logic 1 = VD, CL = 30 pF)Note

Page 7 - Analog Output - DSD Mode

CS4397DS333F1 152.0 TYPICAL CONNECTION DIAGRAMSCLKAudioDataProcessorExternal ClockMCLKAGNDAOUTR+CS4397SDATAVAAOUTR-+5VAnalog0.1 µF+1 µFModeSelect(Con

Page 8 - Dynamic Performance Mode

CS439716 DS333F13.0 REGISTER DESCRIPTION3.1 DIFFERENTIAL DC OFFSET CALIBRATIONMode Control Register (address 01h)Access:R/W in I2C and SPI.Default:

Page 9 - DIGITAL CHARACTERISTICS (T

CS4397DS333F1 173.3 MODE SELECTMode Control Register (address 01h)Access:R/W in I2C and SPI.Default:00000Function:The Mode Select pins determine the

Page 10 - SWITCHING CHARACTERISTICS (T

CS439718 DS333F14.0 PIN DESCRIPTION - PCM MODE Reset - RSTPin 1, InputFunction:The device enters a low power mode and all internal state machines reg

Page 11 - DSD_L, DSD_R

CS4397DS333F1 19Serial Clock - SCLKPin 11, InputFunction:Clocks individual bits of serial data into the SDATA pin. The required relationship between t

Page 12

CS43972 DS333F1TABLE OF CONTENTS1.0 CHARACTERISTICS/SPECIFICATIONS ... 4ANALOG CHAR

Page 13

CS439720 DS333F1cles in Single Speed, 2304 cycles in Double Speed and 4608 cycles in Quad Speed mode. The bias volt-age on the outputs will be retaine

Page 14 - SPI Mode

CS4397DS333F1 21Common Mode Voltage - CMOUTPin 25, OutputFunction:Filter connection for internal bias voltage, typically 50% of VREF. Capacitors must

Page 15 - DS333F1 15

CS439722 DS333F1Address Bit 1 / Control Data Input - AD1/CDINPin 3, InputFunction:In I2C mode, AD1 is a chip address bit. CDIN is the control data in

Page 16 - This function will be

CS4397DS333F1 235.0 PIN DESCRIPTION - DSD MODEMaster Clock - MCLKPin 10, InputFunction:The master clock frequency must be either 4x or 6x the DSD dat

Page 17

CS439724 DS333F16.0 PIN DESCRIPTION - 8X INTERPOLATOR MODEMaster Clock - MCLKPin 10, InputFunction:The master clock frequency must be either 32x, 48x

Page 18

CS4397DS333F1 257.0 APPLICATIONS7.1 Recommended Power-up Sequence1. Hold RST low until the power supplies, master, and left/right clocks are stable.

Page 19

CS439726 DS333F18.0 CONTROL PORT INTERFACEThe control port is used to load all the internal settings of the CS4397. The operation of the control port

Page 20

CS4397DS333F1 27 MAPMSBLSBDATA byte 1byte nR/WMAP = Memory Address Pointer = 0ADDRESSCHIPCDINCCLKCS0010

Page 21

CS439728 DS333F1M4 M1(DIF1)M0(DIF0)DESCRIPTION FORMAT FIGURE00 0Left Justified, up to 24-bit data02900 1I2S, up to 24-bit data13001 0Right Justified,

Page 22

CS4397DS333F1 29 -160-140-120-100-80-60-40-2000.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55 0.56 0.57 0.58 0.59 0.6Frequen

Page 23

CS4397DS333F1 3TABLE OF FIGURESFigure 1. Serial Audio Input Timing ... 10Figure

Page 24

CS439730 DS333F1-160-140-120-100-80-60-40-2000.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1Frequency (normalized to Fs)Amplitude dB-160-140-1

Page 25 - 7.0 APPLICATIONS

CS4397DS333F1 31-100-90-80-70-60-50-40-30-20-100012345678910Frequency (normalized to Fs)Amplitude dB-100-90-80-70-60-50-40-30-20-1002.5 3 3.5 4 4.5 5

Page 26 - 8.1 SPI Mode

CS439732 DS333F1 LRCKSCLKLeft ChannelRight ChannelSDATA +3 +2 +1LSB+5 +4MSB-1 -2 -3 -4 -5 +3 +2 +1LSB+5 +4MSB-1 -2 -3

Page 27 -

CS4397DS333F1 339.0 PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all othe

Page 28

CS439734 DS333F111.0 PACKAGE DIMENSIONSINCHES MILLIMETERSDIM MIN MAX MIN MAXA 0.093 0.104 2.35 2.65A1 0.004 0.012 0.10 0.30B 0.013 0.020 0.33 0.51C 0

Page 29

CS43974 DS333F11.0 CHARACTERISTICS/SPECIFICATIONSANALOG CHARACTERISTICS (TA = 25 °C; Logic "1" = VD = 5 V; VA = 5V; Logic "0" = D

Page 30 - 30 DS333F1

CS4397DS333F1 5ANALOG CHARACTERISTICS (Continued) Notes: 3. Valid with the recommended capacitor values on FILT+ and CMOUT as shown in Figure 1. Incre

Page 31 - Frequency

CS43976 DS333F1ANALOG CHARACTERISTICS (Continued) Notes: 4. Response is clock dependent and will scale with Fs. Note that the response plots (Figures

Page 32 - 12 11 1014

CS4397DS333F1 7ANALOG CHARACTERISTICS - DSD MODE (TA = 25 °C; Logic "1" = VD = 5 V; VA = 5V; Logic "0" = AGND; Full-Scale Output S

Page 33 - 10.0 REFERENCES

CS43978 DS333F1ANALOG CHARACTERISTICS - 8X INTERPOLATOR MODE (TA = 25 °C; Logic "1" = VD = 5 V; VA = 5V; Logic "0" = AGND; Full-Sc

Page 34 - 11.0 PACKAGE DIMENSIONS

CS4397DS333F1 9DIGITAL CHARACTERISTICS (TA = 25°C; VD = 3.0V - 5.25V)ABSOLUTE MAXIMUM RATINGS (AGND = 0 V, all voltages with respect to ground.)WARNI

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